Simple, accurate and efficient charge pump voltage inverter
Date：August 4, 2025 Views：15
Keeping the op amp output "active" at or below zero volts, generating symmetrical output signals, and processing bipolar analog inputs are all examples of design situations that require a few milliamps of negative voltage rails. Figure 1 shows a simple inverter design based on the old x4053 series triple CMOS SPDT switch that efficiently and accurately reverses the positive voltage rail and achieves voltage step-down.
U1a and U1b combine with C2 to form a reverse-phase capacitor charge pump that transfers the charge to the filter capacitor C3. Charge transfer occurs in a cycle that begins with C2 charging through U1a to V+ and then completes by partially discharging C2 to C3 through U1b. Under the control of a U1c Schmidt triger-type oscillator, the pumping frequency is about 100 kHz, so charge transfer occurs every 10 seconds. Note the positive feedback around U1c through R3 and the negative feedback through R1, R2, and C1.
The resulting (approximate) oscillator waveforms (Vc1 and U1c Vpin9) are shown in Figure 2. '
Figure 2 100kHz timing signal generated by U1c Schmidt trigger oscillator.
The xx4053 series guaranteed break before close switch maximizes efficiency while minimizing noise. When V+ = 5 V, the on-resistance of the switch increases inherently as the Vout decreases, thereby reducing the short-circuit output fault current to about 20 mA. It takes about 5 milliseconds to start on power-up.
If you need to operate at higher V+ inputs (up to 10 V), you can use a metal gate CD4053B. Of course, the rated voltage of the capacitor needs to be correspondingly higher.
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