Source: Cadence Author: Cadence
    To provide a better user experience, including high-quality video transmission, updated laptops (such as the latest AI PC), and other cutting-edge devices, advanced node SoCs of 5 nanometers and below are required to achieve excellent power consumption, performance, and area (PPA) targets. However, as technology advances to process nodes below 5 nanometers, SoC suppliers are confronted with various challenges, such as the need to balance low power consumption and low operating voltage (typically below 1.2V). Meanwhile, the market also demands high-resolution cameras, faster frame rates and AI-driven computing, which requires interfaces to have higher data transmission rates and stronger anti-electromagnetic interference (EMI) capabilities.

    As these performance requirements become increasingly complex, the market urgently needs innovative solutions to bridge the gap between high efficiency and energy conservation and advanced functions. Against this backdrop, Cadence was the first in the industry to introduce the eUSB2V2 IP, which is based on TSMC's advanced N3P process and complies with the latest embedded USB2 version 2 standard. It can provide unprecedented functions for laptops, AI video devices and advanced image signal processing (ISP) systems, transforming computing devices.

The first complete eUSB2V2 IP solution adopting TSMC's N3P technology has been completed and taped out
    eUSB2V2 is a new USB standard released in September 2024, marking a significant technological leap in the development of USB interfaces in modern computing systems. Cadence was the first company to complete the tape-out of a comprehensive eUSB2V2 interface solution on TSMC's N3P process. This solution includes PHY IP and controller IP, making it highly suitable for advanced CPU and AI-driven applications. This solution serves as a bridge connecting traditional USB 2.0 and modern systems, ensuring seamless compatibility.
    Although the 480Mbps data rate of USB 2.0 is sufficient to meet the demands of early laptops, modern systems require higher bandwidth to handle high-resolution cameras, AI computing and real-time data processing. The eUSB2V2 can be scaled up to 4.8Gbps, with a tenfold increase in speed. This can support seamless transmission of 4K videos, achieve smoother augmented reality (AR) applications, and also unleash the unlimited potential of AI integration in consumer electronics and enterprise devices.
    "With the eUSB2V2 IP solution that was the first in the industry to adopt TSMC's N3P technology, we can simplify the system design while addressing the comprehensive challenges of low-voltage operation and high data rate requirements," said Arif Khan, Senior Product Director of Protocol IP in Cadence's Chip Solutions Division. This tape-out milestone demonstrates our determination to provide leading IP technology and help customers create outstanding innovative products.

Cutting-edge functions for various applications
    Cadence's eUSB2V2 IP solution brings higher performance, flexibility and energy efficiency to the computing, Internet of Things and wireless communication industries. These solutions feature scalable link configuration, low power consumption, and outstanding EMI noise reduction capabilities, providing compact designs for applications such as AI-enabled iot devices, 4K camera systems, and 5G wireless modules, thereby achieving peak performance.
    The advanced PHY IP of TSMC's N3P process can provide asymmetric link modes up to 4.8Gbps or symmetric configurations ranging from 960Mbps to 4.8Gbps, allowing designers to optimize for specific use cases. The eUSB2V2 IP fully complies with the eUSB2V2 and UTMI 2.0 standards, supporting low-power states, scalable data rates, and flexibility of hosts or peripherals. It is an ideal choice for cutting-edge laptops, AI-driven video processing, and a new generation of communication systems.
    Lluis Paris, senior director of the Ecosystem and Alliance Management Department of TSMC's North American subsidiary, said: "This partnership reflects our joint commitment to predicting technological demands and providing leading solutions to drive industrial innovation." We continue to collaborate with OIP open innovation platform partners such as Cadence to ensure that the latest design solutions fully leverage the high performance and efficiency advantages of our advanced process technologies.

eUSB2V2 improves the USB design
    In response to the challenges faced by modern computing, Cadence's comprehensive IP ecosystem offers powerful solutions, from which engineers, designers and manufacturers are bound to benefit. With higher data rate, lower operating voltage and greater flexibility, the tape-out of Cadence eUSB2V2 IP solution adopting TSMC's N3P technology not only realizes the evolution of the USB interface, but also represents a major leap in the industry. Out of recognition of Cadence eUSB2V2 IP solution, an important customer and early user have purchased this IP for their new generation of computing device SoC.