In 2024, the integrated circuit industry continues to evolve amid change and opportunity. In the face of the new normal of the global economy, the acceleration of technological innovation and the constant changes in market demand, how can IC companies remain competitive and achieve sustainable development in the New Year? Chip Yaohui Technology Co., LTD. (hereinafter referred to as: Chip Yaohui), the IP leader in the integrated circuit industry, shares the experience and results of the past year, and looks forward to the future development trends and opportunities.
    In the rapid development of science and technology, artificial intelligence is ushering in explosive growth, the widespread popularity of AI chips and the rapid progress of software-defined systems are accelerating the arrival of the era of intelligent everything. Entering the post-Moore era, the traditional chip development path has encountered a bottleneck, and advanced packaging technologies such as 3DIC and Chiplet have emerged, providing new impetus for breaking through the dilemma. These technologies not only open up new directions for the improvement of chip performance and integration, but also bring innovative solutions and become an important driving force for the continuous progress of the chip industry.
    In this era, IP and IC design technology is at the key node of a new round of change, ushering in unprecedented opportunities. In the complex chip design architecture, all kinds of IP play a crucial role, they are like the bridge connecting the internal computing module of the chip and the external device, indispensable. Because AI chips need to process and transmit massive data, not only do different computing modules in the chip directly need to carry out high-speed data exchange, such as CPU, GPU, NPU will realize high bandwidth and low latency interconnection through UCIe, Die-to-Die interface and other IP. It also requires efficient, scalable, and consistent interconnection with external devices, such as high-speed and accurate data transmission between IP addresses and storage and network devices through PCIe and Serdes interfaces. Moreover, the AI chip needs to read and write a large amount of data frequently during operation, which requires very high bandwidth and capacity of the memory. Through HBM, DDR, LPDDR and other interfaces, high-speed data transmission is realized between IP and storage particles, effectively solving the bandwidth bottleneck and accelerating the flow of data between the chip and memory. Meet the memory capacity and bandwidth requirements of AI chips from all aspects. Therefore, in the field of AI chips, interface IP can significantly improve the performance of AI chips, and at the same time, it can also achieve functional optimization and expansion, helping customers fully release the potential of design and assume a more critical role.

Create a one-stop complete IP platform solution to realize the strategic transformation from traditional IP to IP2.0
    Looking back at 2024, the domestic semiconductor industry has experienced many internal and external challenges. Nevertheless, it was still a fruitful year for Xinyaohui.
    Faced with the rapid rise of the artificial intelligence market, high-speed interface IP such as UCIe, HBM3E and 112G SerDes introduced by Chiplet are widely used in the field of Chiplet and artificial intelligence. UCIe technology solves the problem of on-chip D2D interconnection of CHIplet, while HBM improves the interconnection efficiency between high-bandwidth memory and chip. 112G SerDes, on the other hand, realizes high-speed interconnection between chips and significantly improves cluster efficiency.
    With its advantages of high bandwidth density, low transmission delay and PCIe and CXL multiplexing, UCIe has become the first choice of D2D interconnection standard in Chiplet. The UCIe IP launched by CHIplet covers two modules, PHY and Controller IP. Among them, the maximum rate of PHY IP in advanced packaging can support 32Gbps, and the maximum rate of standard packaging can also support 24Gbps, and has an excellent energy efficiency ratio and low transmission delay, and the maximum transmission distance supports 50mm, far beyond the 25mm in the standard protocol. It provides greater flexibility and scalability for the customer's Chiplet solution, and Controller IP is compatible with multiple interfaces such as FDI, AXI, CXS.B, etc., allowing customers to achieve seamless switching with the system design when integrated.
    HBM is outstanding in AI, high-performance computing and other fields due to its high bandwidth, low power consumption and low latency. Xinyaohui also launched the domestic technology HBM3E PHY and Controller IP, in which the maximum transmission rate of PHY can support 7.2Gbps, Controller has excellent bandwidth utilization, the maximum speed can support 10Gbps. In the field of SerDes, Serdes IP, with its high data transmission rate and low power consumption characteristics, has become the preferred solution in the internal connection and external communication of the data center, and the core has launched different combinations of SerDes PHY, which supports up to 112Gbps, and supports a variety of protocols such as PCIe, OIF and Ethernet. Meet the speed requirements of different customers. At the same time, Xinyaohui also launched a compatible PCIe and CXL controller IP, one-stop solution to customers' IP selection and integration problems.
    Xinyaohui successfully developed the above high-speed IP in 2024 and has completed delivery. In the process of research and development, core Yaohui has conducted in-depth discussions with many customers and reached a cooperation intention. After the launch of the product, it quickly received positive responses from customers in the fields of artificial intelligence, data center and high performance computing, and launched in-depth cooperation with them.
    It is worth mentioning that in 2024, Xinyaohui successfully realized the strategic transformation from traditional IP to IP2.0, helping customers gain an advantage in the fierce market competition. The comprehensive upgrade is achieved through the one-stop complete IP platform solution, which not only provides high-performance, low-power, highly compatible high-speed interface IP, but also provides the base IP and controller IP to help SoC customers improve performance from the inside out. Focus on product reliability, compatibility and mass production, and provide system-level packaging support, optimize PHY layout, Bump and Ball configuration, improve mass production performance, and help customers accelerate product to market. At the same time, Xinyaohui provides end-to-end solutions by integrating complete subsystem resources, from solution formulation to integration verification, to hardening and packaging testing. In addition, Xinyaohui actively promotes the domestic supply chain, provides Substrate and Interposer design references, and coordinates the upstream and downstream industry chains to help industrial technology breakthroughs.

AI has brought new increments to the semiconductor IP industry, and domestic IP opportunities and challenges are flying together
    While the scale of the global semiconductor IP market continues to grow, emerging areas such as artificial intelligence, data centers, and intelligent vehicles have brought new additions to the semiconductor IP industry, and the growing demand for high-performance chips in these areas has greatly promoted the continued development of the IP market, especially the increasing demand for interface IP. However, with some external uncertainties, the demand for localization is more urgent, and the iteration speed of domestic advanced manufacturing process is slower, which provides opportunities for localization IP but also brings great challenges.
    The opportunity is that with the promotion of domestic demand, the domestic chip is backed by a broad market advantage, providing a broad space for the development of domestic IP, the future market will steadily expand, especially the Chiplet related products and services, will usher in a period of vigorous development.
    The challenge comes from the slowing down of domestic advanced process iteration and the increasing difficulty of foreign advanced process acquisition. Under this background, SoC will put forward higher requirements for domestic IP, and it is necessary to realize a higher speed interface IP design on the basis of the existing process, which undoubtedly increases the difficulty and cost of IP design. At the same time, Chiplet, as the preferred solution for SoC architecture improvement, can meet these challenges, but it also brings a series of challenges such as packaging, testing, and mass production, which also affects IP design. Therefore, IP companies not only need to provide reliable, compatible and mass-producible IP products, but also need to have strong system packaging design capabilities and supply chain management capabilities to ensure the smooth implementation of the overall solution.
    In the face of such opportunities and challenges, the company will continue to optimize the interface IP of the existing process to meet the needs of customers' diversified application scenarios, fully release the potential of domestic processes by improving the interface IP performance, and keep up with the pace of protocol evolution, and gradually introduce interface IP that meets DDR6, LPDDR6, PCIe7 and other advanced protocol standards. In addition, the Foundation IP will be expanded to cover different Foundry and process, and more performance-optimized digital controller IP will be introduced to provide customers with a wider choice and stronger technical support.
    In the emerging Chiplet market, Xinyaohui will provide system-level package design solutions to help customers launch high-reliability and mass-producible Chiplet IP products, and work with domestic upstream and downstream enterprises to jointly create a complete domestic supply chain. In the field of automotive gauge chips, with our extensive experience and IP accumulation in AEC-Q100 and ISO 26262 functional safety certifications, the company will further expand the coverage of automotive gauge IP solutions to help customers accelerate functional safety assessments and ensure the realization of the appropriate target ASIL level. This helps SoC customers reduce design, certification, and product launch time and costs.
    Xin Yaohui believes that as a local IP authorization service enterprise, we must deeply understand the needs of customers, fully grasp the application scenarios and actual needs of customers, develop IP products that fully meet the needs of customers and provide IP related services that customers need. At the same time, we can not do industry followers, only seek domestic alternatives, but should focus on market demand, do other domestic manufacturers do not do well, but it is very difficult. Focus on difficult and valuable products, improve the industrial chain, provide strong support for the industry through IP licensing and services, and create maximum value for the chip industry.
    The current and the next decade, is the semiconductor industry, especially China's semiconductor golden decade, although since last year, the semiconductor industry is facing a slowdown in growth and this year's more severe blockade situation, we still firmly believe that the semiconductor industry will usher in a full recovery, in the process of such market changes, more able to highlight the core Yaohui real in the difficult to do practical things, The advantages of down-to-earth technology innovation and solutions. With the arrival of the industry recovery, the company will usher in greater growth opportunities.
    Looking forward to 2025, Xinyaohui will take the new mature IP2.0 solution as the core, combined with high-reliability, mass-producible IP portfolio, complete subsystem solutions, system-level package design, and strong supply chain capabilities, anticipate and solve various challenges that customers may encounter in IP applications, and better adapt to market innovation needs.