TRSP(M)4040A General Description:
The TRSP(M)4040A series is a 4-bit microcontroller that can play 1 channel melody or 1 channel ADPCM with PWM direct drive circuit. The PWM resolution is 8/10/12 bits. They include low-cost, high-performance CMOS microprocessors. The clock frequency for this uplink is usually 4.096 (±3%) MHz. The chip operates in a wide voltage range of 1.5V ~ 5.5V, and contains program ROM (PROM) and data ROM (DROM).
The program ROM is 4K/8K words and the data ROM size is 120K/112K bytes. The maximum working SRAM is (64+2) half bytes. It provides a total of four software-programmable I/O ports.
TRSP(M)4040A Features:
* Operating voltage: 1.5V to 5.5V
*MCU operating frequency: 2.048/4.096 MHz
* Memory size
- Program ROM size: 4K/8K* 12-bit OTP type
- Data ROM size: 120K/112K bytes OTP type
-SRAM size: 96 x 4 bits
- User register: 2 x 4 bits
* Power off mode wake-up function:
-HALT mode Wake up source: Port A can wake up from HALT mode to NORMAL mode and execute the wake up subroutine.
*4 input/output pins: Port A can be defined bit by bit as an input or output port.
* Triple reset condition:
- Low voltage reset. (LVR=1.45V)
- Power-on and reset.
- Watchdog timer overflowed.
* An internal interrupt source:
-PWM is interrupted.
*WDT
- Watchdog timer, which can be enabled/disabled by option.
- The WDT period is 256 x 256 x 16/Fsys. (For the system clock =2.048MHz, the WDT cycle is 0.13 seconds)
* Audio Output:
- Supports PWM mode.
- Support 8/10/12 bits.
* Support pull-down resistor 1M, 50K ohm, low voltage reset and other options.
* Oscillator fuse option ±3%, temperature and voltage compensation.
* Support read disable security option (1 bit).
* Support 16 level LVD function.
TRSP(M)4040A package:
TRSP(M)4040A provides SOP8
TRSP(M)4040A block diagram:TRSP(M)4040A Application circuit:
Note: C1:10uF~100uF (depending on application), C2:0.1uF