What is parasitic inductance?

    Parasitic Inductance refers to the additional inductance inadvertently generated in a circuit due to the physical structure and layout of wires, circuit boards, leads, and other components in addition to the intended inductance elements (such as inductors, transformers, etc.). This inductance is often unavoidable, part of all electrical components in a circuit, and is often seen as a side effect.

    The parasitic inductance will affect the performance of the circuit, especially in high frequency signal processing, which may cause signal distortion, noise increase and so on.

Source of parasitic inductance

Parasitic inductance mainly comes from the following aspects:

1. Wires and cables:

   • Wires, cables, and the lead of the circuit board (the copper line on the PCB) will have a certain parasitic inductance. This is because conductors always have a certain length and surround characteristics, and when electrons flow in the wire, a magnetic field is generated, which causes inductance.

2. Connection and welding points:

   • Solder joints, connectors, and other mechanical connections on the board may introduce additional parasitic inductance. The shape and layout of these connection points can also lead to an uneven distribution of current, which can affect the size of the inductance.

3. Circuit layout and package:

   • In the design of circuit board, the choice of layout will directly affect the size of parasitic inductance. For example, long, thin wires or a poor grounding design can result in a large parasitic inductance.

4. Device packaging:

   • Some electronic components, such as integrated circuits (ics), transistors, diodes, etc., will also have parasitic inductors inside the package. For example, the IC's pin spacing and metal connections may introduce parasitic inductance.

5. PCB layout and design:

   • The stack structure of the circuit board, the routing direction and the design of the ground layer will affect the size of the parasitic inductance. For example, wiring longer signal and power lines will have higher parasitic inductance.

Effect of parasitic inductance

The presence of parasitic inductance in a circuit is not always harmful, but it can have an adverse effect on circuit performance in some cases, especially in high-frequency circuits:

1. Affect signal transmission:

   • In high frequency circuits, parasitic inductance may cause distortion or reflection of the signal, resulting in a decrease in the efficiency of signal transmission.

2. Form resonance phenomenon:

   • Parasitic inductors, together with capacitors, may form an LC circuit. If the circuit operates at its resonant frequency, it may cause excessive oscillation or instability of the circuit, affecting system performance.

3. Increase noise and interference:

   • The parasitic inductance in the power supply loop may lead to the increase of the power supply noise, especially to the high frequency signal interference.

4. Affect current transmission:

   • In high speed digital circuit, parasitic inductance can cause the current lag, making the circuit response slow and reduce the working speed.

How to reduce parasitic inductance

Although parasitic inductance is unavoidable, through reasonable design, its impact can be reduced to:

1. Reduce wire length:

   • Shorten the length of signal cables and power cables. Long wires will increase parasitic inductance, so the design should try to avoid lengthy lines.

2. Improve PCB design:

   • In the PCB layout, the crossing between the power and signal lines is minimized to reduce the loop area of the line. Reasonable arrangement of power layer and signal layer, using thicker copper layer can effectively reduce parasitic inductance.

3. Using ground and multilayer PCBS:

   • By using ground layer or multi-layer PCB structure, parasitic inductance can be effectively reduced and electromagnetic interference (EMI) of the circuit can be reduced.

4. Appropriate package selection:

   • When selecting components, attention should be paid to the package form of components, and the package with low parasitic inductance should be selected as far as possible, such as the package with shorter pins or the package type suitable for high-frequency work.

5. High frequency filter design:

   • In high frequency circuits, the use of appropriate filters and decoupling capacitors can help reduce the effect of parasitic inductance on the signal.

Calculation of parasitic inductance

The calculation of parasitic inductance usually takes into account the geometry of the conductor and the electrical properties of the surrounding medium. In simple terms, the parasitic inductance L can be approximated by the following formula:

L=lμ0?N2?A

Among them:

• 
  L is inductance (unit: Henry, H)
• 
  0μ0 is the permeability of a vacuum (
  0≈4X10
  7H/mμ0≈4π×107H/m）
• 
  N is the number of turns of the coil
• 
  A is the cross-sectional area of the coil (unit: square meters, m2)
• 
  l is the length of the coil (unit: m, m)

However, for actual circuits, calculating parasitic inductance is more complex and usually requires the use of specialized simulation software (such as ANSYS HFSS, CST, etc.) for modeling and analysis.