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TRSF4A0XXA/B
The TRSF4A0XXA/B series is a 4-bit microcontroller that can play 4-channel melodies or 4-channel ADPCM with PWM direct drive circuit. The PWM resolution is 12 bits. They include a low-cost, high-performance CMOS microprocessor. The clock frequency for this uplink is usually 13.1072 (±3%) MHz. The chip operates in a wide voltage range of 1.8V ~ 5.5V, with built-in program ROM and data ROM. The maximum program ROM is 8K words, and the data ROM size is 32K to 124K bytes, depending on PROM density. The maximum working SRAM is (512+2) half bytes. It provides a total of four software-programmable I/O ports.
TRSF4A0XXA/B General Description:
The TRSF4A0XXA/B series is a 4-bit microcontroller that can play 4-channel melodies or 4-channel ADPCM with PWM direct drive circuit. The PWM resolution is 12 bits. They include a low-cost, high-performance CMOS microprocessor. The clock frequency for this uplink is usually 13.1072 (±3%) MHz. The chip operates in a wide voltage range of 1.8V ~ 5.5V, with built-in program ROM and data ROM. The maximum program ROM is 8K words, and the data ROM size is 32K to 124K bytes, depending on PROM density. The maximum working SRAM is (512+2) half bytes. It provides a total of four software-programmable I/O ports.
TRSF4A0XXA/B Features:
* Operating voltage: 1.8V to 5.5V
* Internal HROSC:65.536 MHz, LRCOSC 32K Hz
-MCU operating frequency: 13.1072 MHz
* Memory size
- Flash capacity: 2KX12, 4KX12, 6KX12 or 8KX12 bits.
- Flash data ROM capacity: 32Kx8~124KX8 bits, depending on PROM density.
-SRAM size: 512X4 bits
- User register: 2X4 bits
* Power off mode wake-up function
-HALT mode Wake up source: Port A, PWM, and RTC wake up can wake up from HALT mode to NORMAL mode, and run wake up subroutines.
*4 input/output pins: Port A can be defined bit by bit as an input or output port.
* Triple condition
- Low voltage reset (LVR=1.7V)
- Power-on and reset
- Watchdog timer overflowed
* An internal interrupt source
-PWM interrupt
*WDT
- Watchdog timer, which can be enabled/disabled by option
The WDT period is 0.23 seconds (LRCOSC clock source =32.000K Hz±50%).
* Audio output
- Support 8/10/12-bit PWM
* Support drop-down resistance 1M/ (50K or 220K), low voltage reset and other options.
* Oscillator fuse option ±3%, temperature and voltage compensation
* Support security options (1 bit) to protect user code.
* Low Voltage Detection (LVD)
*12 signed x 8 Unsigned multiplication
* Support indirect jump instructions JMPX, JMPPMA.
* Support direct call commands CALLX and CALLPMA.
* Up to 8 level stacks are used for calling child routes.
* Touch function: 4 I/ OS
*WKRTC
- The real-time clock is in pause mode, which can be enabled/disabled by the option
- The wake up period is 16/32/64/128ms selected by the user code.
- Runs only in Stop mode.
(LRCOSC clock source =32.000K Hz±50%)
* Internal HROSC:65.536 MHz, LRCOSC 32K Hz
-MCU operating frequency: 13.1072 MHz
* Memory size
- Flash capacity: 2KX12, 4KX12, 6KX12 or 8KX12 bits.
- Flash data ROM capacity: 32Kx8~124KX8 bits, depending on PROM density.
-SRAM size: 512X4 bits
- User register: 2X4 bits
* Power off mode wake-up function
-HALT mode Wake up source: Port A, PWM, and RTC wake up can wake up from HALT mode to NORMAL mode, and run wake up subroutines.
*4 input/output pins: Port A can be defined bit by bit as an input or output port.
* Triple condition
- Low voltage reset (LVR=1.7V)
- Power-on and reset
- Watchdog timer overflowed
* An internal interrupt source
-PWM interrupt
*WDT
- Watchdog timer, which can be enabled/disabled by option
The WDT period is 0.23 seconds (LRCOSC clock source =32.000K Hz±50%).
* Audio output
- Support 8/10/12-bit PWM
* Support drop-down resistance 1M/ (50K or 220K), low voltage reset and other options.
* Oscillator fuse option ±3%, temperature and voltage compensation
* Support security options (1 bit) to protect user code.
* Low Voltage Detection (LVD)
*12 signed x 8 Unsigned multiplication
* Support indirect jump instructions JMPX, JMPPMA.
* Support direct call commands CALLX and CALLPMA.
* Up to 8 level stacks are used for calling child routes.
* Touch function: 4 I/ OS
*WKRTC
- The real-time clock is in pause mode, which can be enabled/disabled by the option
- The wake up period is 16/32/64/128ms selected by the user code.
- Runs only in Stop mode.
(LRCOSC clock source =32.000K Hz±50%)
TRSF4A0XXA/B block diagram:
TRSF4A0XXA/B package:
The TRSF4A0XXA/B series provides SOP8
TRSF4A0XXA/B Application Circuit:
Attention:
1.C1:10uF~100uF (depending on application), C2:0.1uF (high ESD protection).
1.C1:10uF~100uF (depending on application), C2:0.1uF (high ESD protection).
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