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CD4052
The CD4052 is a 2-way four-option analog switching circuit with a common enable input control bit.
CD4052 is mainly used in analog multiplexing switches, digital multiplexing switches and signal gating.
CD4052 package form: DIP16 / SOP16 / SSOP16 / TSSOP16
CD4052 is mainly used in analog multiplexing switches, digital multiplexing switches and signal gating.
CD4052 package form: DIP16 / SOP16 / SSOP16 / TSSOP16
CD4052 Description：
CD4052 is a two-way four-option analog switching circuit with a common enable input control bit.
Each multiple selector switch has four independent inputs/outputs (Y0 to Y3), A common input/output (Z), and a selection input (A). The common enable input control bits include two selective inputs A0 and A1 and a low effective enable input E.
Each path consists of four bidirectional analog switches with one side of the switch connected to a separate input/output (Y0 to Y3) and the other side connected to a common input/output (Z). When E is low, one of the four switches is gated by A0 and A1 (low resistance on-state). When E is high voltage, all switches are in a high resistance off state, and have nothing to do with A0 and A1.
VDD and VSS are power supply voltages connected to digital control inputs (A0, A1, and E). The range of (VDD-VSS) is 3 ~ 9V, and the analog input and output (Y0 ~ Y3 and Z) can vary between the highest VDD and the lowest VEE. (VDD-VEE) does not exceed 12V. For use as a digital multiplexer switch, VEE and VSS are connected together (usually grounded).
CD4052 is mainly used in analog multiplexing switches, digital multiplexing switches and signal gating.
CD4052 package form: DIP16 / SOP16 / SSOP16 / TSSOP16
CD4052 Typical application circuit diagram:
Logic diagram:
CD4052 Pin distribution:
CD4052 pin definition:
CD4052 functional block diagram:
CD4052 package diagram:
CD4052 DIP16 :
CD4052 TSSOP16:
CD4052 SOP16 :
CD4052 is a two-way four-option analog switching circuit with a common enable input control bit.
Each multiple selector switch has four independent inputs/outputs (Y0 to Y3), A common input/output (Z), and a selection input (A). The common enable input control bits include two selective inputs A0 and A1 and a low effective enable input E.
Each path consists of four bidirectional analog switches with one side of the switch connected to a separate input/output (Y0 to Y3) and the other side connected to a common input/output (Z). When E is low, one of the four switches is gated by A0 and A1 (low resistance on-state). When E is high voltage, all switches are in a high resistance off state, and have nothing to do with A0 and A1.
VDD and VSS are power supply voltages connected to digital control inputs (A0, A1, and E). The range of (VDD-VSS) is 3 ~ 9V, and the analog input and output (Y0 ~ Y3 and Z) can vary between the highest VDD and the lowest VEE. (VDD-VEE) does not exceed 12V. For use as a digital multiplexer switch, VEE and VSS are connected together (usually grounded).
CD4052 is mainly used in analog multiplexing switches, digital multiplexing switches and signal gating.
CD4052 package form: DIP16 / SOP16 / SSOP16 / TSSOP16
CD4052 Typical application circuit diagram:
Logic diagram:
CD4052 Pin distribution:
CD4052 pin definition:
CD4052 functional block diagram:
CD4052 package diagram:
CD4052 DIP16 :
CD4052 TSSOP16:
CD4052 SOP16 :
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